1. Field of the Invention
The present invention relates to a local area network (LAN) bridge apparatus for interfacing a plurality of LANs by controlling packets transmissions among the LANs.
2. Description of the Background Art
As a conventional LAN bridge apparatus for interfacing a plurality of LANs, there has been a multi-access control (MAC) address learning type LAN bridge apparatus which carries out the packet filtering operation to receive all the packets transmitted from each LAN and discard those packets which are destined to the nodes of the same LAN as they are transmitted from, because the relaying of these packets to the other LANs is unnecessary and could lead to the deterioration of the transmission efficiency in the other LANs.
Conventionally, such a conventional LAN bridge apparatus has been realized in a form of a micro-processor operated by an appropriate control program to carry out the above described packet filtering operation.
More specifically, the micro-processor of such a conventional LAN bridge apparatus operates as follows.
First, the micro-processor controls the LAN controller to operate in the all receiving mode. Then, the micro-processor registers the sender addresses of the packets transmitted from each LAN in its memory, so as to carry out the address leaning operation to learn the addresses of the nodes belonging to each LAN. Then, the micro-processor carries out the packet filtering operation by comparing the destination address of each packet transmitted to the LAN controller with the sender addresses registered in its memory, and discarding those packets whose destination addresses coincide with the sender addresses registered in its memory, so as not to relay these packets to the other LANs.
Now, in such a conventional LAN bridge apparatus, the address learning operation to register the sender addresses as well as the packet filtering operation to judge the relaying or discarding of each packet are carried out entirely by the program execution on the micro-processor, so that the there is a possibility for the micro-processor to spend a considerable portion of its operation time for the processing of the address learning and the packet discarding rather than the packet relaying, especially when there are many communications within the same LAN. In such a case, the load on the micro-processor increases considerably, and for this reason, it has been difficult to improve the throughput of such a conventional LAN bridge apparatus as a whole even when the high speed micro-processor is employed.